agilent hmps-282x series minipak surface mount rf schottky barrier diodes data sheet description/applications these ultra-miniature products represent the blending of agilent technologies proven semiconduc- tor and the latest in leadless packaging. this series of schottky diodes is the most consistent and best all-round device available, and finds applications in mixing, detecting, switching, sampling, clamping and wave shaping at frequencies up to 6 ghz. the minipak package offers reduced parasitics when compared to conventional leaded diodes, and lower thermal resistance. features ? surface mount minipak package C low height, 0.7 mm (0.028") max. C small footprint, 1.75 mm 2 (0.0028 inch 2 ) ? better thermal conductivity for higher power dissipation ? single and dual versions ? matched diodes for consistent performance ? low turn-on voltage (as low as 0.34 v at 1 ma) ? low fit (failure in time) rate* ? six-sigma quality level * for more information, see the surface mount schottky reliability data sheet. pin connections and package marking 3 2 product code date code 4 aa 1 package lead code identification (top view) single 3 2 4 1 #0 anti-parallel 3 2 4 1 #2 parallel 3 2 4 1 #5 the hmps-282x family of diodes offers the best all-around choice for most applications, featuring low series resistance, low forward voltage at all current levels and good rf characteristics. note that agilents manufacturing techniques assure that dice found in pairs and quads are taken from adjacent sites on the wafer, assuring the highest degree of match. notes: 1. package marking provides orientation and identification. 2. see electrical specifications for appropriate package marking.
2 hmps-282x series absolute maximum ratin g s [1] , t c = 25 c symbol parameter units minipak 1412 i f forward current (1 m s pulse) a 1 p iv peak inverse v olta g e v 15 t j junction t emperature c 150 t stg storage t emperature c -65 to +150 q jc thermal resistance [2] c/w 150 notes: 1 . operation in excess of any one of these conditions may result in permanent damage to the device. 2 . t c = +25 c, where t c is defined to be the temperature at the package pins where contact is made to the circuit board. electrical specifications , t c = +2 5 c, single diode [4] maximum maximum minimum maximum forward reverse t ypical part package breakdown forward v oltage leakage maximum dynamic number marking lead v oltage v oltage v f (v) @ i r (na) @ capacitance resistance hmps- code code configuration v br (v) v f (mv) i f (ma) v r (v) c t (pf) r d ( w ) [ 4 ] 2820 l 0 single 15 340 0.5 10 100 1 1.0 12 2822 k 2 anti-parallel 2825 j 5 parallel t est conditions i r = 100 m ai f = 1 ma [1] v f = 0 v i f = 5 ma f = 1 mhz [2] notes: 1 . d v f for diodes in pairs is 15 mv maximum at 1 ma. 2 . d c to for diodes in pairs is 0.2 pf maximum. 3 . effective carrier lifetime ( t ) for all these diodes is 100 ps maximum measured with krakauer method at 5 ma. 4 . r d = r s + 5.2 w at 2 5 c and i f = 5 ma. esd warning: handling precautions should be t aken t o a void static discha r ge.
3 c j r j r s r j = 8.33 x 10 -5 nt i b + i s where i b = externally applied bias current in amps i s = saturation current (see table of spice parameters) t = temperature, k n = ideality factor (see table of spice parameters) r s = series resistance (see table of spice parameters) c j = junction capacitance (see table of spice parameters) linear equivalent circuit model diode chip spice parameters parameter units hmps-282x b v v15 c j0 pf 0.7 e g ev 0.60 i bv a 1e-4 i s a 2.2e-8 n 1.08 r s w 8.0 p b v 0.65 p t 2 m 0.5 linear circuit model of the diodes package 30 ff 30 ff 20 ff 20 ff 1.1 nh single diode package (hmpx-x8x0) 2 3 1 4 30 ff 30 ff 20 ff 20 ff 12 ff 12 ff 0.5 nh anti-parallel diode package (hmpx-x8x2) 2 3 1 4 0.5 nh 0.05 nh 0.5 nh 0.05 nh 0.05 nh 0.5 nh 0.05 nh 30 ff 30 ff 20 ff 20 ff 0.5 nh 0.05 nh parallel diode package (hmpx-x8x5) 2 3 1 4 0.5 nh 0.05 nh 0.5 nh 0.05 nh 0.5 nh 0.05 nh
4 hmps-282x series typical performance t c = 25 c (unless otherwise noted), single diode figure 1. forward current vs. forward voltage at temperatures. 0 0.10 0.20 0.30 0.50 0.40 i f ?forward current (ma) v f ?forward voltage (v) 0.01 10 1 0.1 100 t a = +125 c t a = +75 c t a = +25 c t a = ?5 c figure 2. reverse current vs. reverse voltage at temperatures. 05 15 i r ?reverse current (na) v r ?reverse voltage (v) 10 1 1000 100 10 100,000 10,000 t a = +125 c t a = +75 c t a = +25 c figure 3. total capacitance vs. reverse voltage. 02 8 6 c t ?capacitance (pf) v r ?reverse voltage (v) 4 0 0.6 0.4 0.2 1 0.8 figure 4. dynamic resistance vs. forward current. 0.1 1 100 r d ?dynamic resistance ( ) i f ?forward current (ma) 10 1 10 1000 100 v f - forward voltage (v) figure 5. typical v f match, series pairs and quads at mixer bias levels. 30 10 1 0.3 30 10 1 0.3 i f - forward current (ma) ? v f - forward voltage difference (mv) 0.2 0.4 0.6 0.8 1.0 1.2 1.4 i f (left scale) ? v f (right scale) v f - forward voltage (v) figure 6. typical v f match, series pairs at detector bias levels. 100 10 1 1.0 0.1 i f - forward current ( m a) ? v f - forward voltage difference (mv) 0.10 0.15 0.20 0.25 i f (left scale) ? v f (right scale) figure 7. typical output voltage vs. input power, small signal detector operating at 850 mhz. -40 -30 18 nh rf in 3.3 nh 100 pf 100 k hsms-282b vo 0 v o ?output voltage (v) p in ?input power (dbm) -10 -20 0.001 0.01 1 0.1 -25 c +25 c +75 c dc bias = 3 a figure 8. typical output voltage vs. input power, large signal detector operating at 915 mhz. -20 -10 rf in 100 pf 4.7 k 68 hsms-282b vo 30 v o ?output voltage (v) p in ?input power (dbm) 10 20 0 1e-005 0.0001 0.001 10 0.1 1 0.01 +25 c local oscillator power (dbm) figure 9. typical conversion loss vs. l.o. drive, 2.0 ghz (ref an997). conversion loss (db) 12 10 9 8 7 6 2 06810 4
5 assembly information the minipak diode is mounted to the pcb or microstrip board using the pad pattern shown in figure 10. 0.4 0.4 0.3 0.5 0.3 0.5 figure 10. pcb pad layout, minipak (dimensions in mm). this mounting pad pattern is satisfactory for most applications. however, there are applications where a high degree of isolation is required between one diode and the other is required. for such applications, the mounting pad pattern of figure 11 is recommended. 2.60 0.40 0.20 0.40 mm via hole (4 places) 0.8 2.40 figure 11. pcb pad layout, high isolation minipak (dimensions in mm). this pattern uses four via holes, connecting the crossed ground strip pattern to the ground plane of the board. smt assembly reliable assembly of surface mount components is a complex process that involves many material, process, and equipment factors, including: method of heating (e.g., ir or vapor phase reflow, wave soldering, etc.) circuit board material, conductor thickness and pattern, type of solder alloy, and the thermal conductivity and thermal mass of components. components with a low mass, such as the minipak package, will reach solder reflow temperatures faster than those with a greater mass. agilents diodes have been quali- fied to the time-temperature profile shown in figure 12. this profile is representative of an ir reflow type of surface mount assembly process. after ramping up from room temperature, the circuit board with components attached to it (held in place with solder paste) passes through one or more preheat zones. the preheat zones increase the temperature of the board and components to prevent thermal shock and begin evaporat- ing solvents from the solder paste. the reflow zone briefly elevates the temperature sufficiently to produce a reflow of the solder. the rates of change of tempera- ture for the ramp-up and cool- down zones are chosen to be low enough to not cause deformation of the board or damage to compo- nents due to thermal shock. the maximum temperature in the reflow zone (t max ) should not exceed 255 c. these parameters are typical for a surface mount assembly process for agilent diodes. as a general guideline, the circuit board and components should be exposed only to the minimum temperatures and times necessary to achieve a uniform reflow of solder. time (seconds) temperature ( c) 0 0 50 100 150 200 221 300 250 350 60 90 30 preheat 130 170 c min. 60 s max. 150 s reflow time min. 60 s max. 90 s peak temperature min. 240 c max. 255 c 150 180 210 240 270 300 360 120 330 figure 12. surface mount assembly temperature profile.
6 minipak outline drawing 1.44 (0.058) 1.40 (0.056) top view side view bottom view 1.20 (0.048) 1.16 (0.046) 0.70 (0.028) 0.58 (0.023) 1.12 (0.045) 1.08 (0.043) 3 2 4 1 0.82 (0.033) 0.78 (0.031) 0.32 (0.013) 0.28 (0.011) -0.07 (-0.003) -0.03 (-0.001) 0.00 -0.07 (-0.003) -0.03 (-0.001) 0.42 (0.017) 0.38 (0.015) 0.92 (0.037) 0.88 (0.035) 1.32 (0.053) 1.28 (0.051) 0.00
7 device orientation tape dimensions and product orientation for outline 4t (minipak 1412) user feed direction cover tape carrier tape reel end view 8 mm 4 mm top view aa aa aa aa note: ?a?represents package marking code. package marking is right side up with carrier tape perforations at top. conforms to electronic industries rs-481, ?aping of surface mounted components for automated placement.?standard quantity is 3,000 devices per reel. p p 0 p 2 f w c d 1 d e a 0 5 max. t 1 (carrier tape thickness) t t (cover tape thickness) 5 max. b 0 k 0 description symbol size (mm) size (inches) length width depth pitch bottom hole diameter a 0 b 0 k 0 p d 1 1.40 0.05 1.63 0.05 0.80 0.05 4.00 0.10 0.80 0.05 0.055 0.002 0.064 0.002 0.031 0.002 0.157 0.004 0.031 0.002 cavity diameter pitch position d p 0 e 1.50 0.10 4.00 0.10 1.75 0.10 0.060 0.004 0.157 0.004 0.069 0.004 perforation width thickness w t 1 8.00 + 0.30 - 0.10 0.254 0.02 0.315 + 0.012 - 0.004 0.010 0.001 carrier tape cavity to perforation (width direction) cavity to perforation (length direction) f p 2 3.50 0.05 2.00 0.05 0.138 0.002 0.079 0.002 distance width tape thickness c t t 5.40 0.10 0.062 0.001 0.213 0.004 0.002 0.00004 cover tape
www.semiconductor.agilent.com data subject to change. copyright ? 2001 agilent technologies, inc. january 22, 2001 5988-1551en
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